This invention relates generally to autonomous spacecraft and, more specifically, to orbiting satellites with high data processing and throughput capabilities. In both commercial and government satellite applications, there is a significant trend toward higher ground data processing and satellite data throughput rates. Processing rates measured in billions (10.sup.9) of floating-point operations per second (referred to as gigaflops), or even measured in multiples of 10.sup.12 floating-point operations per second (teraflops), are required or proposed for some satellite applications. To keep pace with this emerging trend, there is a need for space-based processors capable of handling massive data throughput and processing requirements.
In a conventional spacecraft implementation, these processors would require very large power levels, and would have correspondingly large power dissipation needs. Therefore, conventional satellite systems would need to be larger and more complex to handle very high processing loads. Accordingly, it would be highly desirable to provide an alternative to conventional satellite design, to achieve the required high throughput processing rates without the accompanying disadvantages of increased size and complexity. The present invention achieves this goal, as will become apparent from the following summary.